Homework Help
Created on: December 4th, 2007
Homework Help! FAP Jesus Digital Logic
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4. Since 16 is 1000 in binary, the answer is four. 10. Yuor gain is just output voltage over input, so 2 / 0.010 = 200 is your gain... Lemme ask you: last year of high school or first year of University? Either way, don't take engineering - the girls are ugly and good luck explaining to people exactly what it is you do for a living - again, expecially to women. Do yourself a favor and go to law/med school.
OK, here's what I think the answer is (double check)... Successive approximation ADC's approximate the input signal by going through a binary search of starting from the max value / 2, called a reference. If the input is greater than the reference, then the first bit of the approximation is 1, otherwise zero and the input is now in a reference range between max and max /2 or max /2 and zero. The process is then repeated with the reference now being the range's max value /2. So, in your case (cont.)
This is the last topic I am fuzzy on...
Is it possible to make an asynchronous shift register? Explain.
Is it possible to make a synchronous shift register? Explain.
Look at a shift-register circuit and look at any counter circuit. What one unique thing about the wiring distinguishes a shift register from any type of counter?
Asynchronous one can't exist on it's own, since it can't detect when the next bit is available at input. For example, how would it know when to shift successive 0's (i.e. how would it know how many 0's are in the input data without some signal?)? Synch CAN exist, the timer would trigger the shifting of the bit currently at the input to the next flip-flop. I'd say the biggest difference between the shift register and, say, a ring counter is that the output of the flip-flop with the MSB is connected to (cont)
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